I'm Shayaun

Hardware Engineer | Low-Power Wireless & Battery-less Sensors | Analog Design + Digital ASIC/FPGA Design |

This portfolio highlights my coursework and three years of hands-on research focused on low-power, wireless, and battery-less sensor systems. I’ve worked on projects involving biomedical devices, FPGAs, and both analog and digital design. Through these experiences, I’ve developed strong prototyping skills and the ability to collaborate effectively with interdisciplinary teams. I'm currently seeking hardware engineering roles.

Projects Skills Contact Me
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More About Me

Projects

Baby Pacifier Sensor image

Baby Pacifier Sensor

Sensor Testing and Data Analysis (VNA Testing + Python Scripting) Flex PCB Design (Altium) CAD (Fusion360/OnShape) Microstrip Transmission Line Design (Ansys HFSS) Sensor Fabrication

Designed an embedded force/vacuum sensor into a pacifier to replace the subjective “gloved finger” test, providing clinicians with quantitative data for diagnosing newborn feeding issues during a critical window.
Custom 8bit Adder (KSA) image

Custom 8bit Adder (KSA)

Physical and Transistor Level Layout Design (Cadence Virtuoso) Passing DRC and LVS Static CMOS, dynamic logic styles and transmission gate logic Combinational and Sequential Logic Design

Project goal was to design a custom adder, using any topology, to demonstrate that a manually crafted implementation can outperform a ripple carry adder generated through automatic place and route (APR).
Force Sticker image

Force Sticker

Rigid/Flex PCB Design (Altium Designer) DFT Antenna/PCB Simulations (Ansys HFSS) Low-Power Systems RF Transmission Lines Small Antenna Design

WiForceSticker creates a new class of sticker-like force sensors that are capable of wireless readout without a battery, enabling in-vivo and ubiquitous weight sensing applications.
SHA256+Bitcoin Hashing RTL Model System Verilog Implementation image

SHA256+Bitcoin Hashing RTL Model System Verilog Implementation

Intel Quartus Prime SystemVerilog Parallel Computing Model Sim

Implemented RTL models of the SHA-256 and Bitcoin hashing algorithms in SystemVerilog as part of an exploration into hardware design trade-offs. This allowed us to gain insight into real-world architectural trade-offs in FPGA design.
Self Made SQL Database image

Self Made SQL Database

C++ OOP Patterns/Idioms/OCF SQL Database

Designed a SQL database system in C++, leveraging object-oriented design principles and multiple software design patterns and idioms. Implemented abstraction layers using patterns such as Chain of Responsibility, Decorator, Adapter, Iterator, and Creation patterns. Applied polymorphism, singletons, pure virtual classes, and event listeners to enforce modularity and extensibility. Followed Object Construction Framework (OCF) best practices to enhance maintainability and scalability.

Skills

Contact

Email: shayaunbashar1@gmail.com

Phone: (858)342-9910