Projects
Baby Pacifier Sensor
Designed an embedded force/vacuum sensor into a pacifier to replace the subjective “gloved finger” test, providing clinicians with quantitative data for diagnosing newborn feeding issues during a critical window.
Custom 8bit Adder (KSA)
Project goal was to design a custom adder, using any topology, to demonstrate that a manually crafted implementation can outperform a ripple carry adder generated through automatic place and route (APR).
Force Sticker
WiForceSticker creates a new class of sticker-like force sensors that are capable of wireless readout without a battery, enabling in-vivo and ubiquitous weight sensing applications.
SHA256+Bitcoin Hashing RTL Model System Verilog Implementation
Implemented RTL models of the SHA-256 and Bitcoin hashing algorithms in SystemVerilog as part of an exploration into hardware design trade-offs. This allowed us to gain insight into real-world architectural trade-offs in FPGA design.
Self Made SQL Database
Designed a SQL database system in C++, leveraging object-oriented design principles and multiple software design patterns and idioms. Implemented abstraction layers using patterns such as Chain of Responsibility, Decorator, Adapter, Iterator, and Creation patterns. Applied polymorphism, singletons, pure virtual classes, and event listeners to enforce modularity and extensibility. Followed Object Construction Framework (OCF) best practices to enhance maintainability and scalability.